My name is Paul.

Today at SIGGRAPh, I'm showing off realtime image processing

using high level synthesis on an Intel FPGA.

An FPGA is like a digital logic sandbox that

lets you generate any kind of digital logic

function you want, unlike a CPU or a GPU,

where the architecture is fixed and can't change.

High level synthesis lets you generate this logic

architecture using a familiar language like C++.

The demo we're showing today is an algorithm

called Harris Corner Detection.

What we're seeing here is the realtime video

is being marked with the corner markers, which indicate

locations where the algorithm thinks it's seeing corners

in the video feed.

High level synthesis is an IP offering tool

that's used within a broader FPGA development pipeline.

High level synthesis is used when

you have a complicated algorithm that you want to realize,

and it would be impractical to develop using traditional FPGA

techniques.

A real world use case for high level synthesis

would be realtime image processing, like we're

seeing here, or perhaps packet processing, or digital signal

processing.

Any kind of feedforward approach where you've got data coming in

and data coming out.

High level synthesis and our high level design tools

are very exciting, because they give

people who are not traditionally used

to using FPGAs access to these exciting accelerator

technologies.

For more information about Intel FPGAs

and where you can get one, please check out our website

at Intel.com.