Name: 9.2.4 ストレージ (9.2.4 Storage)
Uploaded: 2021-01-14T10:27:07.000Z
Duration: 6 min 38 s
Description: VoiceTubeの動画で発音を聞きながら英語表現を覚えよう！学べる英語：

The Beta is an example of a reduced-instruction-set

“Reduced” refers to the fact that in the Beta ISA,

most instructions only access the internal registers

using separate memory-access instructions, which

implement only a simple address calculation.

higher-performance hardware implementations and simpler

The ARM and MIPS ISAs are other examples of RISC architectures.

There is a limited amount of storage inside of the CPU —

There's a 32-bit program counter (PC for short) that holds

the address of the current instruction in main memory.

We'll use use 5-bit fields in the instruction to specify

the number of the register to be used an operand or destination.

As shorthand, we'll refer to a register using the prefix “R”

followed by its number, e.g., “R0” refers to the register

Register 31 (R31) is special — its value always reads as 0

and writes to R31 have no affect on its value.

and hence the number of bits supported by ALU operations

Many modern computers are 64-bit architectures,

with byte 0 corresponding to the low-order 7 bits

The Beta ISA only supports word accesses,

either loading or storing full 32-bit words.

Most “real” computers also support accesses to bytes

Even though the Beta only accesses full words, following

a convention used by many ISAs it uses byte addresses.

consecutive words in memory have addresses that differ by 4.

So the first word in memory has address 0,

You can see the addresses to left of each memory location

Note that we'll usually use hexadecimal notation when

specifying addresses and other binary values — the “0x” prefix

When drawing a memory diagram, we'll follow the convention

that addresses increase as you read from top to bottom.

The Beta ISA supports 32-bit byte addressing,

so an address fits exactly into one 32-bit register or memory

The maximum memory size is 2^32 bytes or 2^30 words — that's 4

gigabytes (4 GB) or one billion words of main memory.

Why have separate registers and main memory?

Well, modern programs and datasets are very large,

so we'll want to have a large main memory to hold everything.

But large memories are slow and usually only support access

to one location at a time, so they don't make good storage

for use in each instruction which needs to access several

then an instruction would need to have three 32-bit addresses

to specify the two source operands and destination — each

And the required memory accesses would have to be

one-after-the-other, really slowing down instruction

On the other hand, if we use registers to hold the operands

design the register hardware for parallel access

To keep the speed up we won't be able to have very many

registers — a classic size-vs-speed performance

tradeoff we see in digital systems all the time.

In the end, the tradeoff leading to the best performance

is to have a small number of very fast registers used

by most instructions and a large but slow main memory.

In general, all program data will reside in main memory.

Each variable used by the program “lives” in a specific

main memory location and so has a specific memory address.

the value of variable “x” is stored in memory location

0x1008, and the value of “y” is stored in memory location

To perform a computation, e.g., to compute x*37 and store

the result in y, we would have to first load the value of x

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9.2.4 ストレージ (9.2.4 Storage)

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