Name: TensorFlowの内部: TF開発者のためのMLIR (Inside TensorFlow: MLIR for TF developers)
Uploaded: 2021-01-14T10:05:19.000Z
Duration: 43 min 41 s
Description: VoiceTubeの動画で発音を聞きながら英語表現を覚えよう！学べる英語：

未来進行形

Today, I'll be presenting about MLIR, multi-level intermediate

This will be a little bit different than some

of the other TF training sessions, as most of them

focus on how to better use TF technology,

while here we're looking at something that is still coming.

So there's a little bit mostly forward-looking as to things

that we want to do and where we're going.

Sort of like a 50,000-foot view of what it is,

So the idea there is to show the past, where we came from,

how we got to this point, to point to what

One is the new TensorFlow to TensorFlow Lite converter.

And then we'll also look at the TF2XLA bridge,

looking at some of the forthcoming changes.

And I'll walk through a small example there.

OK, so let's start with the main question.

You can say you can do anything with MLIR,

and everybody has a different opinion about what it is.

TensorFlow's goal is it's "an open source machine learning

Now, in the same way, MLIR, which stands for multi-level

with the ML not representing "machine learning,"

we're looking at "an open source program optimization

Now, the way I think about it is, as MLIR,

and I'll show some examples of what I mean by that--

and as well as it's a reusable set of compiler passes

targeting analysis, program optimization,

and sort of go to exactly the components of what it is.

So when we started MLIR initially, we had a question.

Well, we looked at the ML accelerators and we saw, well,

there is many, many, many accelerators coming forth.

support all these accelerators for all the given [INAUDIBLE]??

And so [INAUDIBLE],, can we make that easier?

of a different approach to doing code generators

So we started looking at our existing code generator

Now, XLA is one of the most advanced machine learning

We have targets for CPU, GPU, TPU, and other back ends.

How can we increase the reuse between a CPU, GPU, and TPU

Well, at the moment, TPU backend doesn't use LLVM,

so that means we have more low level components that

able to reuse some of the same passes or structures.

The TPU backend is specialized for the best TPU performance.

less reuse with the CPU and GPU components.

But also looking at these different backends,

The CPU, and GPU, and TPU do not share abstractions

So if you look at the different backends,

you'll have different levels of support for different loop

abstractions, as well as stencil emitters between the two.

This makes reusing code between the two more difficult.

actual abstractions between HLO and, for example, TPU, LLO,

So you have effectively passes that are effectively

from very coarse grain ops to multiple lower level ops.

ops on all these devices, we must leverage as much shared

these different backends and these abstractions

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TensorFlowの内部: TF開発者のためのMLIR (Inside TensorFlow: MLIR for TF developers)

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